This documentation covers a STM32 Nucleo-H753ZI tutorial project that reads and writes a Winbond W25Q-series SPI NOR flash chip – the Adafruit 5632/5633/5634 QSPI DIP breakout boards, used here in standard SPI mode – over SPI1, with a software-controlled chip select and a destructive validation test suite for confirming correctness on real hardware.

Project Overview

The firmware demonstrates:

STM32H753ZI peripheral setup generated by STM32CubeMX
Standard single-line SPI communication with a Winbond W25Q flash chip
Software-controlled chip select (WQ25_CS) instead of SPI1's hardware NSS, and why that's the correct choice for this chip's multi-phase command protocol (opcode, address, data all under one continuous CS-low period)
Reset and JEDEC ID identification (W25QFlashSPI::Init())
Sector erase, buffered write with internal page-boundary splitting, and buffered read
A fail-hard-at-Init()-but-propagate-elsewhere error handling policy, backed by a configurable per-transaction SPI timeout
A destructive validation test suite covering erased-state verification, a small-range smoke test, a 20-pattern stuck-at/ bit-coupling test, and a page-boundary write test
The C/C++ bridge pattern used to call C++ driver code from CubeMX's plain-C main.c

Project-Level Documentation

W25QFlashSPI – the SPI driver class
W25QValidation – the destructive validation test suite
entryPointCPP.hpp – the extern "C" bridge into main.c

Architectural Direction

This project's documentation is intentionally a single mainpage rather than the multi-page/@defgroup layered structure used by larger projects (e.g. the AS6C4008 SRAM project or MPL3115A2 sensor project) – one driver class plus one validation suite doesn't need that much subdivision. See W25QFlashSPI.hpp's and w25q_validation.hpp's own file-level comments for the detailed design rationale (why software CS, why erase-before-each- pattern-write, why no full-device sweep test, etc.).