H753_CPP_AS6C4008_FMC_DaughterBoard_02
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SRAM Validation Tests

Overview

The validation suite implemented in sram_validation.c treats the external AS6C4008 as a raw byte-addressable memory device. These tests are intentionally destructive and are designed to prove that the FMC-connected SRAM behaves correctly before the firmware relies on it for structured application data.

Validation Philosophy

The validation suite answers the question:

"Does the external SRAM hardware behave correctly as memory?"

These tests are not primarily concerned with linker placement or structured object usage. They are focused on:

  • address correctness
  • read/write correctness
  • full-range coverage
  • representative bit-pattern stress
  • repeatable console-visible diagnostics

The retained integration-dump diagnostics complement this layer, but they do not replace the destructive raw-memory validation flow.