H753_CPP_AS6C4008_FMC_DaughterBoard_02
Loading...
Searching...
No Matches
SRAM Subsystem

Top-level external SRAM subsystem documentation group. More...

Collaboration diagram for SRAM Subsystem:

Topics

 SRAM Validation Layer
 Raw SRAM electrical and addressing validation tests.
 
 SRAM Integration Layer
 Linker/startup integration flow for initialized data placed in SRAM.
 
 H753 Porting Layer
 H753-specific design rules and porting notes.
 
 Memory Map and Linker Layer
 Memory-region, linker, and startup-copy documentation.
 

Detailed Description

Top-level external SRAM subsystem documentation group.