Wire v3 RX Processing Pipeline

This page describes the receive-side processing flow for an incoming Wire v3 frame after raw bytes are delivered by the SX1262 driver.

RX Pipeline Summary

raw radio frame
    -> RadioLink_ParseWireV3Frame()
    -> structural validation
    -> header decode
    -> payload length validation
    -> AES-CMAC verification
    -> replay protection checks
    -> AES-CTR payload decryption
    -> application delivery

RX Frame Validation Rules

A received frame is processed by the following validation stages:

1. Structural validation
   • minimum frame length check
   • version field check
   • fixed header availability check
2. Header decode
   • decode nodeId
   • decode sessionSeqId_le
   • decode msgCounter_le
   • decode payloadLen
3. Payload length validation
   • verify payloadLen is consistent with total frame length
   • verify payload start/end does not exceed buffer bounds
   • identify the CMAC tag position from the validated layout
4. Authentication
   • AES-CMAC verification over header || ciphertext
5. Replay protection
   • sessionSeqId comparison
   • msgCounter freshness validation
6. Payload processing
   • AES-CTR payload decryption
   • delivery to application layer

These stages correspond to the internal processing performed by RadioLink_ParseWireV3Frame().

Wire Layout Assumption

The RX path assumes the canonical Wire v3 layout documented in radioLink_wire_format:

[11-byte fixed header][payloadLen bytes payload][16-byte CMAC]

RX must never infer alternate field ordering or alternate header sizes for Wire v3 frames.